Electronics
Phase shifted full bridge Converters (PSFB)
In this video we take a look at PSFB Converters. This is the summary page, where you can checkout a bit more about the different topics explored in the video.
PSFB Converters are used in a variety of different aplications outside of Inverters, and you can check out more about that in my upcoming series on switching mode powersupplies(SMPS)
What Does This converter do
This interactive tool uses ideal formulas, and assumes perfect conditions. it is for educational purposess and demonstrates the fundamental relationship between different parrameters and the final output voltage, based on the simplified ideal formula:
Vout ≈ Vin * (Ns / Np) * D
If you are intereasted in a more accurate tool, it is recomended you use electronics modeling software
Controls
Live Output
Turns Ratio (Ns/Np)
0.10
Output Voltage (Vout)
20.0V
Output Voltage vs. Duty Cycle
This chart shows all possible output voltages for the current winding ratio. The dot indicates the live output based on the duty cycle slider.
PSFB Converters: A Technical Deep Dive
An interactive exploration of core principles, topology, and soft-switching techniques.
What is a PSFB Converter?
Phase-Shifted Full-Bridge (PSFB) converters represent a specialized class of isolated DC-DC converters, fundamentally designed to step down high DC bus voltages to lower, regulated DC outputs. Its defining features are galvanic isolation via a high-frequency transformer and a sophisticated phase-shifting control mechanism that enables high efficiency through soft-switching.
Core Functionality
Phase-Shifted Full-Bridge (PSFB) converters represent a specialized class of isolated DC-DC converters, fundamentally designed to step down high DC bus voltages to lower, regulated DC outputs. A paramount and integral feature of this topology is the provision of galvanic isolation between its input and output stages, a critical safety and performance attribute achieved through the incorporation of a high-frequency transformer. The operational essence of a PSFB converter revolves around a full-bridge inverter circuit, strategically positioned on the primary side of the isolation transformer. This inverter’s primary role is to convert the incoming DC voltage into a high-frequency AC waveform. On the secondary side, a rectification stage converts this AC output back to a DC voltage. This rectification can be achieved using traditional diode-based rectifiers or, more commonly in high-performance applications, synchronous rectification (SR) utilizing MOSFETs for superior efficiency. The defining characteristic that distinguishes PSFB converters from conventional full-bridge topologies is their sophisticated phase-shifting control mechanism. Unlike simpler pulse-width modulation (PWM), this mechanism precisely regulates the duration and timing of power transfer from the primary to the secondary side, thereby meticulously controlling the output voltage. This allows for fine-tuned power delivery while inherently facilitating soft-switching conditions.
Historical Context
The evolution of the PSFB topology spans several decades, marking its growth as a cornerstone in medium to high-power regulation. Early iterations of these converters typically operated at relatively low kilohertz switching frequencies, limiting their compactness and dynamic response. However, the relentless pace of innovation in power electronics—specifically, the advent of new semiconductor materials (like SiC and GaN) and advanced magnetic materials—has revolutionized modern PSFB designs. These advancements have propelled their efficient operation to hundreds of kilohertz, and even megahertz in some specialized applications. This dramatic increase in switching frequency has enabled a profound reduction in the physical size of converters, often by a factor of 5 to 10 or more, while concurrently boosting their energy conversion efficiency to levels frequently exceeding 95%. As a direct descendant and significant enhancement of the conventional hard-switched full-bridge converter, the PSFB topology was specifically developed to overcome the inherent and substantial switching losses characteristic of its predecessors. It achieves this by incorporating sophisticated soft-switching capabilities, most notably Zero Voltage Switching (ZVS). This groundbreaking innovation has been pivotal in solidifying the PSFB converter’s position as a premier solution in high-performance power conversion. Its ability to minimize switching losses translates into more compact, significantly more efficient, and inherently more reliable power supplies, far surpassing the limitations of traditional hard-switched designs. This historical trajectory underscores the PSFB’s adaptive nature and its continuous relevance in meeting the ever-increasing demands for efficiency and power density.
Power & Voltage Range
PSFB converters are optimally suited for medium to high-power applications, typically handling power levels that span from several hundred watts to well over 10 kilowatts. They demonstrate particular efficacy in scenarios involving high DC input bus voltages, frequently derived from an active Power Factor Correction (PFC) stage, and are a preferred choice when a precisely regulated low output voltage with high current capability is required.
Key Application Areas
Click on an application to see why the PSFB topology is a preferred solution in these demanding sectors.
The pervasive utilization of PSFB converters in demanding, high-power sectors such as telecommunications, data centers, electric vehicles, and renewable energy systems unequivocally demonstrates a significant and sustained preference for power conversion solutions that offer an optimal balance of high efficiency, robust galvanic isolation, and compact power delivery. This widespread adoption firmly indicates that the inherent advantages of PSFB, particularly its ability to achieve Zero Voltage Switching (ZVS), effectively address and overcome the stringent performance, safety, and reliability requirements of these critical applications. This often outweighs the inherent design complexities associated with achieving these benefits. The consistent selection of PSFB for such vital applications underscores that its core strengths—specifically ZVS-enabled high efficiency and galvanic isolation—are profoundly valued and directly align with the fundamental needs of these industries. This firmly entrenches the PSFB as a mature, preferred, and continuously optimized solution within its designated power and application niche.
Fundamental Topology and Operating Principles
The foundational structure of a PSFB converter is defined by its full-bridge configuration on the primary side. This bridge is a sophisticated arrangement comprising four high-performance power electronic switches, typically N-channel MOSFETs or IGBTs, strategically labeled QA, QB, QC, and QD. These switches are precisely interconnected to the primary winding of an isolation transformer, denoted as T1. The input DC voltage ($V_{in}$) is applied across the diagonal points of this bridge. On the secondary side of the transformer, the output is rectified to DC, commonly achieved either through conventional high-speed diode rectifiers or, more efficiently in high-power and high-performance designs, by employing MOSFET switches for synchronous rectification (SR). This SR stage minimizes conduction losses by replacing the forward voltage drop of diodes with the much lower ON-resistance of MOSFETs. Following the rectification stage, an output filter, critically consisting of a series inductor ($L_o$) and a parallel capacitor ($C_o$), meticulously smooths the pulsating rectified DC voltage, delivering a stable and regulated DC output ($V_o$) to the load. Crucially, the design of a PSFB converter intentionally leverages certain parasitic elements inherent to the circuit. Parasitic capacitances ($C_{oss}$) are present across the drain-source terminals of the MOSFET switches, and the transformer’s leakage inductance ($L_{lkg}$)—often considered an imperfection in traditional transformer design—is not merely minimized but actively utilized as a resonant component. In many high-performance designs, an additional external resonant inductor ($L_r$), sometimes referred to as a “shim” inductor, is deliberately added in series with the transformer’s primary winding. This external inductor works in conjunction with the transformer’s inherent leakage inductance to form a precisely tuned resonant tank circuit. This resonant circuit is absolutely essential for actively facilitating the Zero Voltage Switching (ZVS) transitions of the primary switches, allowing energy stored in the inductance to charge and discharge parasitic capacitances before a switch turns on. The control methodology employed in a PSFB converter fundamentally differs from conventional Pulse Width Modulation (PWM) techniques. Instead of directly varying the pulse width of individual switch gate signals to control the duty cycle, power regulation in a PSFB is achieved by precisely adjusting the phase shift between the switching signals applied to the two “legs” of the full bridge. Consider the full bridge divided into two legs: the “leading leg” (e.g., switches QA and QB) and the “lagging leg” (e.g., switches QC and QD). Within each leg, the two switches (e.g., QA and QB) are operated complementarily—meaning one turns ON when the other turns OFF—with a fixed 50% duty cycle, separated by a short, precisely controlled dead time. Similarly, QC and QD in the lagging leg operate with the same complementary 50% duty cycle. The paramount control parameter is the phase shift, denoted as $\phi$, which is applied between the PWM switching signals of these two legs (e.g., the gate signals for leg QC-QD are phase-shifted relative to those for leg QA-QB). This phase shift directly modulates the amount of overlap during which the diagonal switches (e.g., QA and QD, or QB and QC) are simultaneously ON. The duration of this overlap, often referred to as the “effective duty cycle” ($D_{eff}$), directly dictates the amount of energy transferred from the primary to the secondary side, thereby meticulously controlling the output voltage. A larger phase shift corresponds to a wider overlap, resulting in greater power transfer and a higher output voltage. When diagonal switches are simultaneously ON, the full input voltage ($V_{in}$) is applied across the transformer primary, and power is actively transferred to the load. However, a unique and fundamental aspect of the PSFB topology is the critical presence of a “freewheeling” or “recirculating” interval. During this essential interval, either the two upper switches (QA and QC) or the two lower switches (QB and QD) are intentionally turned ON simultaneously. This deliberate action effectively short-circuits the transformer primary winding, causing the voltage across it to drop to zero. Consequently, no power is transferred to the secondary during this period; the output power is sustained by the energy previously stored in the output inductance. Crucially, the primary current freewheels through this shorted path, maintaining its previous state and preventing it from decaying rapidly to zero. This short-circuiting action, facilitated by the phase shift control, is absolutely fundamental to establishing the necessary conditions for achieving Zero Voltage Switching (ZVS) for the primary switches, significantly reducing switching losses. The combination of a fixed 50% duty cycle per leg and the sophisticated phase-shift modulation technique represents a highly advanced control approach. This inherently establishes the necessary conditions for robust soft switching. This design choice shifts the control complexity from managing the individual duty cycles of each switch to meticulously controlling the precise phase relationships and dead-times between the two bridge legs. This approach is exceptionally well-suited for implementation with modern high-performance digital controllers (e.g., DSPs or high-end microcontrollers), which excel at generating complex PWM waveforms with ultra-precise timing. The intrinsic nature of this control scheme, by creating and controlling the duration of the freewheeling intervals, directly underpins the soft-switching objectives of the PSFB converter, positioning it as an exceptionally effective and efficient solution for high-frequency, high-power applications.
Mode Description
Duty Cycle Loss Phenomenon
The phenomenon of “duty cycle loss” in PSFB converters, though seemingly a limitation, is a direct and inherent consequence of the very mechanism—the utilization of leakage inductance and precisely controlled resonant transitions—that enables Zero Voltage Switching (ZVS). This represents a fundamental design trade-off: achieving the benefits of soft switching, which are absolutely essential for realizing high efficiency at elevated operating frequencies, inherently introduces a reduction in the effective duration for power transfer. To precisely compensate for this reduction and meticulously maintain output voltage regulation, either a wider control range for the phase shift or a higher switching frequency may be necessitated. Such compensation, however, can potentially exacerbate other design challenges, notably increased circulating currents, particularly under lighter load conditions where the ZVS range is more difficult to maintain. Therefore, this “loss” is not a defect but rather an intrinsic characteristic and a design challenge inherent to the soft-switching approach, requiring careful and intricate balancing of various parameters to optimize the overall performance of the converter across its entire operating spectrum.
| Operating Mode | Active Primary Switches | Transformer Primary Voltage ($V_{PRI}$) | Primary Current ($I_{PRI}$) Behavior | Secondary Side Behavior |
|---|
Soft Switching: Zero Voltage Switching (ZVS) and Zero Current Switching (ZCS)
The foremost advantage of the PSFB topology is its inherent and highly desirable ability to achieve Zero Voltage Switching (ZVS) for all four power electronic switches on the primary side, which are typically high-voltage MOSFETs or IGBTs. This capability is absolutely paramount for high-frequency operation, as it fundamentally eliminates turn-on switching losses. These losses, which would otherwise be considerable in hard-switched converters, are a major source of energy dissipation. By eliminating them, ZVS leads to a substantial increase in overall converter efficiency, significantly reduces the thermal stress on components, and effectively minimizes electromagnetic interference (EMI) generation. This benefit is particularly pronounced for high-voltage (HV) devices where conventional hard-switching losses would render high-frequency operation impractical.
ZVS (Primary Switches)
The fundamental principle underpinning ZVS hinges on the meticulous exploitation of the resonant interaction between two key elements: the intrinsic parasitic output capacitances ($C_{oss}$) of the MOSFETs and the leakage inductance ($L_{lkg}$) of the high-frequency transformer. In many optimized designs, an external resonant inductor ($L_r$), often precisely sized and referred to as a “shim” inductor, is intentionally added in series with the transformer primary winding to augment this leakage inductance. This combined inductance ($(L_r + L_{lkg})$) forms a critical resonant tank with the switch capacitances. During the dead-time—a precisely controlled, brief interval when both switches in a leg (e.g., QA and QB) are intentionally turned OFF to prevent shoot-through—the energy strategically stored in this resonant inductance is utilized. This stored inductive energy forces a resonant current, which actively charges and discharges the parasitic capacitances of the MOSFETs within that leg. This resonant current ensures that the voltage across the switch (e.g., QB) that is about to turn ON is ideally driven to zero *before* its gate signal is applied and conduction begins. This precise resonant action enables true soft switching, drastically minimizing energy dissipation during turn-on. It is important to note that a larger resonant inductance generally allows ZVS to be maintained over a wider load range, which is beneficial for efficiency, though this can lead to increased duty cycle loss and a slight reduction in overall efficiency at full load. The precise control of the dead-time is absolutely critical for successful ZVS. This intentional delay provides the necessary time for the resonant current, driven by the stored inductive energy, to fully charge and discharge the switch capacitances. Advanced control strategies, such as adaptive dead-time control, are often implemented to dynamically adjust this interval based on real-time varying load conditions and input voltages. This real-time optimization ensures that ZVS performance is maintained or closely approached across the entire load range, thereby robustly minimizing switching losses under diverse operating scenarios, including light load and transient conditions.
The Leading vs. Lagging Leg Dilemma
The achievement of ZVS can exhibit varying degrees of robustness between the two legs of the full bridge due to their differing roles and current magnitudes in the power transfer cycle: Leading Leg (e.g., QA/QB or Q1/Q2): The switches in this leg typically initiate the active power transfer interval. The primary current is usually at a higher magnitude, and the reflected load current actively assists the resonant voltage transition across the switches’ parasitic capacitances. Consequently, achieving ZVS for the leading leg switches is generally more straightforward and can often be reliably maintained across a very wide, if not complete, load range, from heavy to moderately light loads. Lagging Leg (e.g., QC/QD or Q3/Q4): The switches in this leg typically mark the end of the power transfer interval. During their transitions, the primary current may decrease significantly, cross zero, and in some cases, even reverse direction, particularly under lighter load conditions. This dynamic and potentially lower primary current results in less available energy from the resonant inductance for the ZVS transition, making it inherently challenging to achieve full ZVS, especially when the load is light. In such challenging cases, these switches may operate with “Low Voltage Switching” (LVS), where they turn ON when the voltage across them is at a minimum, rather than strictly zero. While not perfect ZVS, LVS still significantly minimizes losses compared to hard switching. The load-dependent characteristic of ZVS, particularly the inherent difficulty in reliably achieving Zero Voltage Switching for the lagging leg under light load conditions, represents a fundamental limitation of the conventional PSFB topology. This implies that while PSFB delivers substantial efficiency gains at mid to full loads, its performance can noticeably diminish at lighter loads. This degradation is a direct consequence of insufficient energy stored in the resonant inductance to fully charge/discharge the switch capacitances at low primary currents. This necessitates the implementation of advanced control strategies, such as adaptive dead-time control or burst mode operation (where the converter periodically enters and exits a standby state), or the integration of complex auxiliary circuits, to sustain high efficiency across the entire operational spectrum. The continuous effort to expand the ZVS range, especially at light loads, highlights the ongoing drive to optimize PSFB performance for diverse and evolving application requirements, such as those in data centers that spend significant time in idle states.
ZCS (Secondary Rectifiers)
For high-performance power conversion systems, particularly those characterized by low output voltage and/or high output current ratings, implementing synchronous rectification (SR) using MOSFETs on the secondary side of PSFB converters is an increasingly common and highly advantageous practice. This advanced approach is overwhelmingly preferred over traditional diode rectifiers because it effectively bypasses the significant conduction losses associated with the forward voltage drop of diodes. By replacing diodes with actively controlled MOSFETs (which have a much lower ON-resistance, $R_{ds(on)}$ ), synchronous rectification achieves superior overall performance and substantially higher efficiency. Zero Current Switching (ZCS) for secondary side synchronous rectifiers is achieved when the SR MOSFET is turned ON or OFF precisely at the exact moment its current is zero. This technique is critically important because it eliminates switching losses associated with current commutation, most notably the destructive reverse recovery losses that plague traditional diodes (or the intrinsic body diodes of MOSFETs when they are forced to conduct in reverse). Achieving ZCS in this manner ensures that the secondary side also operates with minimal switching losses, contributing to the overall high efficiency of the PSFB converter. In a common current doubler rectifier configuration (a popular choice for PSFB converters due to its low conduction losses), the operation involves intricate current paths and complex commutation sequences. For instance, when a primary switch turns ON with ZVS, the transformer secondary voltage can momentarily become zero or even reverse polarity. During this brief period, both secondary rectifiers (SR1 and SR2) may briefly conduct through their body diodes. Active power transfer to the output inductors resumes only when the primary current reverses direction and rises to the level of the reflected output inductor current, allowing for proper and efficient current commutation from the body diode to the main channel of the SR MOSFET.
The Light-Load Challenge
Despite the significant advantages of SR, reliably achieving ZCS for secondary rectifiers presents its own distinct set of challenges, particularly under light load conditions. When the PSFB converter operates in Discontinuous Conduction Mode (DCM) under light load conditions, the output inductor current may become too low or discontinuous. In such scenarios, the output inductor current might flow primarily through the body diode of the synchronous rectifier instead of its low-resistance main channel. This undesirable and inefficient conduction through the body diode leads to increased conduction losses (due to the higher voltage drop of the diode) and a degradation in overall efficiency, especially when the converter is lightly loaded. To precisely mitigate this issue, advanced adaptive control schemes are crucial. These schemes meticulously sense the output current and precisely modulate the turn-on and turn-off times of the synchronous rectifiers’ gate signals, ensuring that the SR MOSFETs are actively switched ON and OFF when the current is truly zero. This eliminates or significantly reduces body-diode conduction losses and substantially improves light-load efficiency without requiring additional, lossy auxiliary circuits. While the PSFB topology is widely recognized and lauded for achieving Zero Voltage Switching on its primary side, the effective implementation of Zero Current Switching for synchronous rectifiers on the secondary side presents its own distinct and equally important set of challenges, particularly under light load conditions. This situation profoundly underscores that optimizing the *overall* efficiency of the converter across its entire operational range demands a comprehensive and meticulous approach, addressing soft-switching conditions and minimizing conduction losses on *both* the primary and secondary sides. Simply achieving ZVS on the primary side is often insufficient to ensure peak performance across the entire operational range. The necessity for precise and adaptive control over secondary-side rectifiers, especially through sophisticated adaptive control schemes, meticulously managing the turn-on and turn-off transitions, demonstrates the continuous and relentless engineering effort required to maximize efficiency from every single component within the power path. This pursuit implicitly acknowledges that the total system efficiency is ultimately constrained by the least efficient element in the entire conversion chain. The body diode conduction, specifically, is a direct consequence of the current commutation characteristics and the precise timing of SR gate signals relative to the inductor current. If the SR is not turned on at the precise zero-current crossing, or if the current reverses prematurely, the body diode will conduct. This means that achieving high efficiency across the *full* load range, especially at light loads, imperatively requires sophisticated and real-time control of the secondary-side rectifiers, not just the primary switches.
Soft-Switching Performance vs. Load
This chart illustrates the typical effectiveness of ZVS/ZCS across different load conditions, reflecting the data in Table 2 from the source report.
| Component Type | Soft Switching Type | Full Load Performance | Mid Load Performance | Light Load Performance | Notes |
|---|---|---|---|---|---|
| Primary Leading Leg Switches | ZVS | Achieved | Achieved | Achieved | Generally easier to achieve ZVS across full load range due to reflected load current assisting resonance. |
| Primary Lagging Leg Switches | ZVS/LVS | Achieved | Achieved | Lost/Difficult | Often operates with Low Voltage Switching (LVS) at light loads due to insufficient resonant energy; requires adaptive control or auxiliary circuits to maintain ZVS. |
| Secondary Rectifiers (Diodes) | Hard Switching | Hard Switching | Hard Switching | Hard Switching | High conduction losses and significant reverse recovery losses, especially at high frequencies and low output voltages. Not suitable for high efficiency. |
| Secondary Rectifiers (Synchronous MOSFETs) | ZCS | Achieved (with proper control) | Achieved (with proper control) | Lost/Difficult | Can experience undesirable body diode conduction at light loads in Discontinuous Conduction Mode (DCM); requires adaptive gate control to eliminate and ensure ZCS. |
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